DDR/LPDDR Verification Engineer — Hybrid, Relocation

Semidynamics, a Europe‑based deep‑tech semiconductor startup in Barcelona, seeks a Digital Verification Engineer to drive subsystem and IP‑level verification of high‑speed interface blocks in AI chips. You will join a skilled team, collaborating with RTL, SoC, firmware and other verification groups.This hands‑on role requires ownership and strong...

Hireroo Ltd is seeking a Lead Design Verification Engineer in Barcelona, Spain, with hybrid work style (4 days in office, 1 day from home). You will own verification strategy and UVM environments for DDR/LPDDR memory interfaces across ASIC/SoC designs.Lead a team, mentor engineers, and collaborate with RTL, architecture and firmware teams to ensure...

Specialization: Semiconductor Design and Functional Verification Job Description Our partner is looking for a Digital Verification Engineer to perform functional verification of DDR/LPDDR memory interfaces within complex ASIC and SoC designs. You will develop and maintain SystemVerilog/UVM testbenches, debug protocol issues and drive coverage closure,...

Specialization: Semiconductor Design and Functional Verification Job Description Our partner is looking for a Lead Design Verification Engineer to lead functional verification of DDR/LPDDR memory interfaces within complex ASIC and SoC designs. You will take ownership of verification strategy, UVM environments and coverage closure, ensuring functional...

We are seeking a Lead Digital Verification Engineer to lead subsystem and IP‑level functional verification of high‑speed interface protocol blocks in our AI chips - namely DDR/LPDDR Memory Interfaces. You will guide a team of highly skilled verification engineers to deliver sign‑off‑quality designs, collaborating closely with RTL design, SoC...

Hireroo Ltd is seeking a Lead Design Verification Engineer in Barcelona, Spain, with hybrid work style (4 days in office, 1 day from home). You will own verification strategy and UVM environments for DDR/LPDDR memory interfaces across ASIC/SoC designs.Lead a team, mentor engineers, and collaborate with RTL, architecture and firmware teams to ensure...

We are seeking a Digital Verification Engineer to perform subsystem and IP‑level functional verification of high‑speed interface protocol blocks in our AI chips - namely DDR/LPDDR Memory Interfaces. Todos los candidatos deben asegurarse de leer atentamente la siguiente descripción del puesto y la información antes de enviar su solicitud.You will join a...

Specialization: Semiconductor Design and Functional Verification Job Description Our partner is looking for a Lead Design Verification Engineer to lead functional verification of DDR/LPDDR memory interfaces within complex ASIC and SoC designs. You will take ownership of verification strategy, UVM environments and coverage closure, ensuring functional...

Specialization: Semiconductor Design and Functional Verification¿Es usted el candidato adecuado para esta oportunidad? Asegúrese de leer la descripción completa a continuación.Job DescriptionOur partner is looking for a Lead Design Verification Engineer to lead functional verification of DDR/LPDDR memory interfaces within complex ASIC and SoC designs.You...