Lead DDR/LPDDR Verification Architect

Hace 2 días

Barcelona, Cataluña, España Hireroo Jornada completa

Hireroo Ltd is seeking a Lead Design Verification Engineer in Barcelona, Spain, with hybrid work style (4 days in office, 1 day from home). You will own verification strategy and UVM environments for DDR/LPDDR memory interfaces across ASIC/SoC designs.

Lead a team, mentor engineers, and collaborate with RTL, architecture and firmware teams to ensure functional correctness and protocol compliance.