Senior Verification Engineer
hace 1 semana
**Job Summary**
We are seeking a highly skilled Senior Verification Engineer to join our team at Robert Bosch Group. As a key member of our verification team, you will be responsible for developing and implementing verification strategies for complex mixed-signal circuits.
Key Responsibilities:
- Develop accurate behavioral models for mixed-signal circuits and verify their performance against circuit-level simulations and measurements.
- Collaborate closely with system architects and analog/digital designers to understand circuit specifications, design intent, and performance requirements.
- Develop mixed-signal verification strategies for state-of-the-art SoCs containing high-speed digital circuits and sensitive analog/RF circuits.
- Implement verification plans and track their coverage to ensure comprehensive testing.
- Develop and run system simulations to verify the design, analyze performance, power, and timing, and uncover bugs.
- Replicate root causes and debug issues in the pre-silicon environment to ensure timely resolution.
- Maintain and improve existing functional verification infrastructure and methodology to ensure efficiency and effectiveness.
- Implement/maintain post-processing scripts for assessing system performance and develop tools for automated generation of verification reports and regression management.
Requirements:
- Masters or Bachelor's degree in Electrical/Electronics/Computer Engineering with at least 5 years of relevant experience in the industry.
- Experience in developing high-quality validation plans, collecting and analyzing test results, and debugging failures to RTL/gate/schematic level.
- Strong problem-solving and teamwork skills, and strong verbal and written communication skills.
- Ability to produce results in a challenging, fast-paced, multi-site, multi-group environment.
- Good working knowledge of Verilog/SystemVerilog and UVM.
- Good working knowledge of DSP techniques used for assessing performance of Radar systems.
- Experience in setting up, running, and debugging Gate Level simulations.
- Work experience with at least one other verification aspect like System modeling, Formal verification, etc. would be an added advantage.
- Proficiency in scripting languages and utilities including Make, Python, etc. will be a bonus.
- Should be able to contribute as an Individual Contributor or technically lead a group of team members as per requirements.
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