Empleos de gls en Barcelona

Hireroo Ltd in Barcelona seeks a Design Verification Engineer to drive gate-level simulation, hardware emulation and timing verification for advanced ASIC/SoC designs. You will collaborate with RTL, DFT, physical design and firmware teams to validate synthesized designs before silicon.Mid to senior level, you will optimize simulation performance, automate...

Semidynamics in Barcelona is seeking a Design Verification Engineer to support gate-level simulation and hardware emulation for our AI chip design teams.Se anima a todos los posibles solicitantes a que se desplacen y lean la descripción completa del puesto antes de presentar su candidatura.You will validate post-synthesis netlists, debug timing and reset...

Hireroo Ltd in Barcelona seeks a Design Verification Engineer to drive gate-level simulation, hardware emulation and timing verification for advanced ASIC/SoC designs. You will collaborate with RTL, DFT, physical design and firmware teams to validate synthesized designs before silicon. Mid to senior level, you will optimize simulation performance, automate...

We are looking for a Design Verification Engineer to support gate-level simulation (GLS) and hardware emulation activities for our AI chip design and verification teams. In this role, you will help ensure silicon correctness by validating post-synthesis netlists, debugging timing and reset issues, and enabling large-scale emulation of SoC designs prior to...

Job Description Our partner is looking for a Design Verification Engineer to support gate level simulation and hardware emulation for advanced semiconductor designs. ¿Tiene las cualificaciones y habilidades adecuadas para este trabajo? Descúbralo a continuación y pulse en "solicitar" para ser considerado. The role focuses on validating synthesized...

We are looking for a Design Verification Engineer to support gate-level simulation (GLS) and hardware emulation activities for our AI chip design and verification teams. This is a hands-on role requiring close collaboration with RTL design, DFT, physical design, and firmware teams. Set up, run, and debug gate-level simulations (GLS) for functional, timing...

We are looking for a Design Verification Engineer to support gate-level simulation (GLS) and hardware emulation activities for our AI chip design and verification teams. This is a hands-on role requiring close collaboration with RTL design, DFT, physical design, and firmware teams. Set up, run, and debug gate-level simulations (GLS) for functional, timing...

Job DescriptionOur partner is looking for a Design Verification Engineer to support gate level simulation and hardware emulation for advanced semiconductor designs.The role focuses on validating synthesized designs, identifying timing and functional issues, and supporting hardware emulation before silicon production. You will collaborate with RTL, DFT,...