DDR Design Engineer
Hace 19 horas
barcelona, cataluña, España
Semidynamics
Jornada completa
Gratis con email o Google
Guarda esta oferta y sigue tu búsqueda
Crea una cuenta gratis para guardar empleos, crear alertas y volver a esta oferta desde tu panel.
Gratis con email o Google
Al continuar, aceptas nuestros Términos & Política de Privacidad.
Are you passionate about microprocessor architecture? We need you As a Senior Memory Design Engineer, you play a crucial role in designing and developing memory subsystem solutions for our semiconductor portfolio. You will work within the Memory Design Team and work closely with other teams' highly skilled engineers to create efficient and high-performance memory subsystems that are essential for modern designs.
RequirementsIndustrial experience +8 yearsKnowledge of DDR or HBM memories. Proven experience in design and/or integration of memory controllers.
Experience in AXI protocol.
Proficiency in RTL design using Verilog or VHDLExperience with Timing and Timings ConstraintsExperience with basic block level testingDesiredMaster or PhDKnowledge of scripting languages (Python, Perl, Bash, TCL).
Knowledge of revision control methodology and tools (git, svn).
Knowledge of coherency concepts and protocols.
Experience in memory map definition.
Why Semidynamics?Work at one of Europe's most promising deep-tech semiconductor scale-ups.
Accelerated development path.4 days per week in the Barcelona office (city center), 1 WFH.1 week of work from everywhere in the world.
Competitive package.
A collaborative, technical, and growth-oriented environment that values direct ownership and clear thinking.
RequirementsIndustrial experience +8 yearsKnowledge of DDR or HBM memories. Proven experience in design and/or integration of memory controllers.
Experience in AXI protocol.
Proficiency in RTL design using Verilog or VHDLExperience with Timing and Timings ConstraintsExperience with basic block level testingDesiredMaster or PhDKnowledge of scripting languages (Python, Perl, Bash, TCL).
Knowledge of revision control methodology and tools (git, svn).
Knowledge of coherency concepts and protocols.
Experience in memory map definition.
Why Semidynamics?Work at one of Europe's most promising deep-tech semiconductor scale-ups.
Accelerated development path.4 days per week in the Barcelona office (city center), 1 WFH.1 week of work from everywhere in the world.
Competitive package.
A collaborative, technical, and growth-oriented environment that values direct ownership and clear thinking.