Senior Rtl/Asic Engineer For High-Value Soc Design
Hace 2 días
Madrid, España
Oesía Group
Jornada completa
Gratis con email o Google
Guarda esta oferta y sigue tu búsqueda
Crea una cuenta gratis para guardar empleos, crear alertas y volver a esta oferta desde tu panel.
Gratis con email o Google
Al continuar, aceptas nuestros Términos & Política de Privacidad.
Grupo Oesía in Madrid is seeking an experienced ASIC digital design engineer to join a multidisciplinary team. You will design, develop and integrate high-value So C solutions, contributing from RTL coding to verification and collaboration with multiple disciplines.
The role emphasizes Verilog/System Verilog, RTL design, UVM verification, and collaboration across design, verification and physical implementation teams, with opportunities to influence architecture and silicon validation in strategic
The role emphasizes Verilog/System Verilog, RTL design, UVM verification, and collaboration across design, verification and physical implementation teams, with opportunities to influence architecture and silicon validation in strategic