NCG Design Engineer

hace 2 semanas

Zaragoza, Zaragoza, España Microchip Technology A tiempo completo

Are you looking for a unique opportunity to be part of a dynamic team that works on cutting-edge technology? At Microchip Technology, we offer a collaborative atmosphere of trust, empowerment, respect, diversity, and communication. Our company is built by dedicated team players who love to challenge the status quo, and we take pride in our commitment to employee development, values-based decision making, and strong sense of community.

As a Design Engineer in the MPU group, you will work with our global Silicon Development Team in design and implementation of complex SoCs. You will be responsible for performing and optimizing synthesis of hierarchical multi-voltage designs, driving low-power implementation and optimization using UPF description, and collaborating with cross-functional teams to ensure timely delivery of high-quality designs.

Key qualifications for this position include a Master's degree in electronics engineering or related field, knowledge in hardware description languages, and experience with complete SOC RTL to GDS to silicon release flow. If you are a motivated and analytical individual with excellent problem-solving skills, we encourage you to apply for this exciting opportunity.

Responsibilities:

  • Perform and optimize Synthesis of hierarchical multi-voltage designs
  • Drive low-power implementation and optimization using UPF description
  • Perform CLP flow, analyse and debug CLP checks for valid power definition
  • Perform and validate functional ECOs
  • Interact with and support Front-End, STA and Back-End teams
  • Collaborate with Methodology team for continuous flow development and improvement
  • Collaborate with cross-functional teams to ensure timely delivery of high-quality designs

Requirements/Qualifications:

  • Master's degree in electronics engineering or related field
  • Knowledge in hardware description languages (e.g., Verilog, VHDL, Verilog-AMS, SystemVerilog)
  • Knowledge of C and scripting languages
  • Knowledge and exposure of complete SOC RTL to GDS to silicon release flow
  • Able to learn new system designs and validation methodologies
  • Analytic and problem-solving skills
  • Good level of English (regular written and oral communication with other Microchip sites in several countries)

Travel Time: 0% - 25%

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