Senior Digital Verification Engineer

hace 2 días

Barcelona, Barcelona, España Monolithic Power Systems A tiempo completo
Job Summary

A Senior Digital Verification Engineer will define and lead the development of the Digital Verification framework and infrastructure of complex digital and mixed-signal ICs utilizing leading edge technologies with industry standard ASIC tools.

Key Responsibilities
  • Define and develop UVM and System Verilog based Digital Verification environment.
  • Standardize, define, develop, and document VIPs.
  • Integrate VIPs into the Project's Digital Verification environment.
  • Define Digital Verification Metrics for RTL and Gate-Level Verification.
  • Develop Test Plans and Regression's infrastructure.
  • Lead the Digital Verification Team and supervise Digital Verification Tasks.
  • Review Digital Verification Metrics and Results.
  • Define and design Digital Verification Top-Level Tests.
  • Analyze and debug test results, code coverage, and functional coverage.
  • Estimate, plan, and schedule Digital Verification to meet tape-out dates.
Qualifications
  • PhD/BS/MS in Electrical Engineering with emphasis in Digital Design/VLSI coursework.
  • 5+ years of strong experience in both RTL and Gate-Level Verification.
  • Proficient in Digital Verification Industry Languages (UVM, System Verilog) and Standards.
  • Leadership skills to guide the DV Team and mentor Jr. DV Designers.
  • Good written/verbal communication skills and strong team work/collaboration.
About Monolithic Power Systems

Monolithic Power Systems, Inc. (MPS) strives to build and maintain a culture of diversity, equity, and inclusion. We recognize that diverse voices and ideas make our company and our products stronger, and we believe that our employees benefit when they are immersed in an inclusive culture of teamwork, fairness, and tolerance.

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