Staff Design Engineer
hace 3 semanas
49026BR
- CANADA - Canada, CANADA - Ontario - Kanata, CANADA - Ontario - Markham, CANADA - Ontario - Mississauga, CANADA - Ontario - Nepean
**Job Description and Requirements**
**Staff Design Engineer**
- ASIC RTL design and verification at chip level and/or block level
- Solid Verilog, PERL, TCL and Python skills
- Understanding of static timing analysis and synthesis, DFT/ATPG skills would be a plus
- Knowledge of any high-speed communication protocol is not mandatory but an asset
- Previous knowledge in customer support and/or silicon bring-up is a plus- Generate test benches and test cases
- Perform RTL and gate-level SDF-annotated simulations and debug
- May perform mixed-signal (digital + analog) simulations and debug
- Other related duties as assigned by the manager
Key Qualifications
- BSEE degree or Applied Science degree (or equivalent) with 8+ years of related experience
- Excellent communication and presentation skills
- At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
- Stay Connected: Join our Talent Community**Job Category**
- Engineering
**Country**
- Canada
**Job Subcategory**
- ASIC Digital Design
**Hire Type**
- Employee
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