SOC Full Chip Emulation Engineer

Hace 1 semana

Barcelona, Cataluña, España Semidynamics Jornada completa
Role Overview

Para una comprensión completa de esta oportunidad y de lo que se requerirá para ser un candidato exitoso, siga leyendo.

Semidynamics is seeking a SOC Full Chip Emulation Engineer for our AI SOCs. You will develop emulation infrastructure and validate end-to-end scenarios including CPUs, high-speed interfaces and peripherals. We are looking for a hands-on individual contributor with a proven track record in emulation - including testbenches, transactors, emulation tests, system use cases - to ensure the highest quality before tapeout.

SOC Full Chip Emulation Infrastructure

- Define and establish the emulation infrastructure.
- Develop and implement elastic testbenches for emulated design configurations.
- Transactors for high-speed interfaces and peripherals.
- Own and run CI, sanity, full regression cycles for emulation.

SOC Full Chip Validation Using Emulation

- Integrate and deploy emulation test suites to ensure rigorous validation.
- Develop emulation tests to achieve 100% coverage of targeted system use cases.
- Validate performance KPIs through emulation.
- Cross Functional collaboration for early enablement of Firmware, Software teams.

Why Semidynamics?

- Work at one of Europe's most promising deep-tech semiconductor start up - from silicon to systems - Semidynamics.
- Accelerated development path.
- 4 days per week in the Barcelona office (city center), 1 day WFH.
- 1 week of work from everywhere in the world.
- Competitive package.
- A collaborative, technical, and growth-oriented environment that values direct ownership and clear thinking.

Requirements

Must-Have

- In-depth expertise with industry emulation platforms (Palladium, Zebu or Veloce) with experience in CPUs, Cache Coherency, PCIe, AXI, CHI, Ethernet, Memory protocols.
- Minimum 6+ years experience having signed-off on emulation for multiple projects. xghoner
- University degree in Electrical or Computer Engineering.

Highly Desirable

- Prior experience in Platform power on and Post silicon debug