Research Engineer

hace 2 meses

Barcelona, España Barcelona Supercomputing Center (Bsc) A tiempo completo

.Job Reference648_24_CS_Int_RE1PositionResearch Engineer - RTL Integration (RE1)Closing DateThursday, 31 October, 2024Reference: 648_24_CS_Int_RE1Job title: Research Engineer - RTL Integration (RE1)About BSCThe Barcelona Supercomputing Center - Centro Nacional de Supercomputación (BSC-CNS) is the leading supercomputing center in Spain. It houses Mare Nostrum, one of the most powerful supercomputers in Europe, was a founding and hosting member of the former European HPC infrastructure PRACE (Partnership for Advanced Computing in Europe), and is now hosting entity for Euro HPC JU, the Joint Undertaking that leads large-scale investments and HPC provision in Europe. The mission of BSC is to research, develop and manage information technologies in order to facilitate scientific progress. BSC combines HPC service provision and R&D into both computer and computational science (life, earth and engineering sciences) under one roof, and currently has over 1000 staff from 60 countries.Look at the BSC experience:BSC-CNS You Tube ChannelLet's stay connected with BSC FolksWe are particularly interested for this role in the strengths and lived experiences of women and underrepresented groups to help us avoid perpetuating biases and oversights in science and IT research. In instances of equal merit, the incorporation of the under-represented sex will be favoured.We promote Equity, Diversity and Inclusion, fostering an environment where each and every one of us is appreciated for who we are, regardless of our differences.If you consider that you do not meet all the requirements, we encourage you to continue applying for the job offer. We value diversity of experiences and skills, and you could bring unique perspectives to our team.Context And MissionApplications are invited for an engineer in High Performance Computing (HPC) architectures at the Barcelona Supercomputing Center (BSC). BSC intends to pave the way to the future low-power European processor for Exascale in the context of multiple architecture initiatives, such as EPI, Lenovo, Intel and Zettascale Lab.Key DutiesDesign and Implement the components required to assemble a RISC-V-based HPC system that meets the specified performance targets.Analyze the performance of a RISC-V based HPC processor system, with special emphasis on the top-level integration of the constituent modules and the interconnection to external peripherals.Design and implement the necessary HW and SW components to support the simulation and debugging of a RISC-V-based HPC system.Requirements- Education- BS or MS in Computer Science, Computer Engineering or Electrical Engineering. Previous industrial experience is a big plus.- Essential Knowledge and Professional Experience- Computer Architecture: microarchitecture, resource sharing in multicores, cache hierarchy, interconnection network.- Performance Analysis and Tuning of parallel applications.- Programming: HD languages such as System Verilog, Verilog and VHDL

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