Principal Verification Engineer

hace 1 semana

Valencia, España Ams Osram A tiempo completo

The CSA division supplies sensors that bridge the gap between the world we live in and the digital world of machines.
By converting physical signals - heartbeats, sounds, light waves - into data, we enable robots, cars and other devices to interact with people and improve our world.
What drives CSA is a relentless desire to contribute to technology and have a meaningful impact on the world.
This business thrives on solving complex problems and partnering with global leaders at the forefront of technological advancement.
Our goal: to push the boundaries of sensor technology and empower innovators to make the world smarter, healthier and happier.
Verification of mixed-signal CMOS ICs and IP blocks Define verification plans for mixed-signal circuits and ensure adequate verification coverage to enable bug free silicon manufacturing Model analog and mixed-signal blocks using a high-level description language (e.g.
SystemVerilog, VerilogAMS) Create DV (Design Verification) test cases, run associated simulations and debug the results Lead and mentor less experienced DV engineers Promote cutting-edge DV methodologies and make their use available to the community Successfully completed university degree in Electronics, Electrical Engineering, Physics or comparable Several years (~7 years) of professional experience in mixed-signal design/verification with hands-on experience with relevant design/simulation tools Solid knowledge of design verification methods, tools and languages (Digital Mixed-Signal simulation, SystemVerilog, UVM, assertions …) Experience in analog block modeling Analytical mind to solve complex problems and debugging skills Team-oriented and ability to mentor less experienced engineers Strong commitment to deadlines and the advancement of the DV discipline Good communication skills and proficiency in English #J-18808-Ljbffr

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