PICs@ICFO Strategic Initiative: Principal Engineer in Photonic Design and Design Kit Development

As part of the Strategic Initiative, ICFO coordinates PIXEurope, a flagship Pilot Line funded under the European Chips JU program. With €400 million in investments and a consortium of 20 partners across 11 countries, the project aims to reinforce Europe's strategic autonomy in photonic technologies and accelerate industrial uptake of cutting-edge integrated photonics. Over the next decade, PIXEurope will enable the transfer of advanced technologies to manufacturing environments, while fostering innovation and scalability across the European photonics ecosystem.

We are seeking an experienced scientist or engineer with a strong background in photonic integrated circuit (PIC) design, process design kit (PDK/ADK/TDK) development, and semiconductor manufacturing workflows. The selected candidate will play a pivotal role in the definition, development, and implementation of photonic design kits and design rules, ensuring consistency and interoperability across technology platforms. This is a unique opportunity to help shape the industrialization of integrated photonics in Europe.

Key Responsibilities:

The successful candidate will be expected to:

• Lead the development and maintenance of PDKs, ADKs, and TDKs for photonic and electronic-photonic integrated platforms.
• Define, implement, and validate design rules, DRC/LVS procedures, and layout verification methodologies in collaboration with foundry partners.
• Collaborate closely with semiconductor foundries, EDA tool vendors, and R&D teams to ensure technology portability and standardization.
• Support the integration of new materials and device libraries into photonic design kits, bridging design and process development.
• Contribute to cross-consortium coordination within PIXEurope, ensuring alignment with industrial standards and interoperability frameworks.
• Train and mentor junior engineers and researchers in design workflows and tool usage.

This position will be dedicated full time to the European Chips JU Pilot Line project PIXEurope directed by Prof. Dr. Valerio Pruneri.

This contract has received funding from the European Union's Horizon Europe under the Grant Agreement # , Chips Joint Undertaking (Chips JU) and the Spanish Ministry for Digital Transformation and Civil Service, and is supported by funds from the Recovery, Transformation and Resilience Plan (PRTR).

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Applicants must hold, at the time of appointment, an internationally recognized engineering degree or PhD-equivalent, preferably in Photonics, Electrical Engineering, or related fields.

We are looking for candidates with a proven track record in the following:

• Photonic design and layout development using industry-standard EDA tools (e.g., Synopsys, Ansys, Cadence, Luceda, Mentor, GDSFactory).
• PDK/ADK/TDK development, including device modeling, parameter extraction, and technology integration.
• Experience in design rule definition, DRC/LVS workflows, and mask layout verification. Reticle planning, wafer floorplanning and dicing planning is a plus.
• Preferably, direct experience working in or with semiconductor foundries and multi-project wafer (MPW) environments.
• Demonstrated ability to lead technical development projects involving multiple stakeholders from academia and industry.

What We Offer

• Indefinite contract for scientific and technical activities pursuant to Spanish Law 14/2011, linked to the duration or availability of funds within the PIXEurope Pilot Line
• Access to cutting-edge facilities and a vibrant, interdisciplinary research environment.
• Opportunity to lead impactful projects that connect fundamental research with commercial applications.
• A family allowance may be granted to candidates with dependents, upon request and in accordance with ICFO's policies.

Suitable candidates are requested to submit:

• A presentation letter outlining your interest in the position.
• A curriculum vitae, including full contact information.
• The contact e-mail addresses of two referees who can provide professional references.

Applications will be reviewed as they are received.

For formal enquiries regarding the application process, please contact:

For project and technology enquiries, please contact:

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30th of November, 2025