Senior Validation Engineer

hace 2 semanas

Valencia, España ams R&D Spain S.L. A tiempo completo

The CSA division supplies sensors that bridge the gap between the world we live in and the digital world of machines. By converting physical signals - heartbeats, sounds, light waves - into data, we enable robots, cars and other devices to interact with people and improve our world. What drives CSA is a relentless desire to contribute to technology and have a meaningful impact on the world. This business thrives on solving complex problems and partnering with global leaders at the forefront of technological advancement. Our goal: to push the boundaries of sensor technology and empower innovators to make the world smarter, healthier and happier.
- Creation of validation concepts for integrated IC design
- Specification and design of validation PCBs for IC lab evaluation
- SW coding for instruments control intended for lab automation scripts for IC evaluation
- Firmware design for FPGA and/or MCUs for IC control
- Lab characterization of ASICs across temperature and operating conditions
- Coordination with project technical lead test development for product development and release activities: lab to test correlation, lab setup handover to production
- Successfully completed university degree in Electronics or comparable
- Several years (min. 2 years) of experience in lab validation with hands-on experience on relevant SW tools and related equipment
- Knowledge in one or more of the below areas will be desirable:

- PCB design techniques and relevant EDA SW tools (e.g. Altium, Allegro, PADS )
- RTL coding (Verilog/VHDL) for FPGA intended for IC control in lab and/or FW coding for MCU’s
- Tools / scripting for lab automation such as LabView, TestStand, Python
- Hands-on experience with lab measurement equipment such as DMM, SMU’s, oscilloscope, digital IO cards, spectrum & network analyzer
- Team oriented, committed to deadlines and development discipline with a visible “what’s best for the company” mentality
- Analytical mind for solving complex problems and debugging design issues popping up in during lab validation activities
- Fluent in English, knowledge of Spanish would be an advantage

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