Staff Digital Design Verification

Staff Digital Design VerificationAnalog DevicesAbout Analog DevicesAnalog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at and on LinkedIn and Twitter (X).The GroupThe Advanced Cores Group is seeking a motivated individual for an opportunity to contribute to key design verification tasks for Analog Devices’ next generation IPs, integrated circuits, design IPs, modules and systems. The Design Verification Engineer will get a unique opportunity to work on enhancing the Metric-Driven Verification environments by adding components, easing debug, evaluating new tools & methodologies, and enhancing Metric-Driven Verification tools and solutions to boost Design Verification productivity across ADI. This role requires an energetic individual with strong communication, organization, and technical skills who works well in a diverse environment across a geographically distributed organization.ResponsibilitiesDefine test-plans, tests and verification methodology for block/chip-level verification. Work with the design team in generating test-plans and closure of code and functional coverage.Utilize Directed and Constrained random verification techniques along with System Verilog assertions.Be proficient in architecting and developing UVM testbenches at block and chip level.Be proficient in writing testcases to execute on the testplan using System Verilog and C (for firmware cosimulations).Verify complex designs and sub-systems using leading edge verification methodologies.Be proficient in debugging RTL and Gate Level Simulation (GLS), waiving Timing Violations approved by the designers.Demonstrate the ability to automate various verification tasks using languages such as Python.Support post-silicon verification activities of the products working with design, product evaluation and applications engineering team.Be familiar with Digital Signal Processing concepts, and tools such as MATLAB or Octave.Be able to document work through good English writing and reading skills for widening the knowledge base.Be familiar with Formal Verification techniques and approaches.Be able to effectively communicate with Mixed-Signal Design Verification and the Firmware teams.Have effective interpersonal, teamwork, and communication skills enabling the candidate to contribute and influence decisions on methodologies/strategies to be adopted for verification.Technically mentor and guide junior verification engineers on SoC Verification.QualificationsBachelor's or master’s degree, in Engineering (Electronic Engineering) or equivalent.Excellent debugging and analytical skills.5-10 years in ASIC design verification.Additional Preferred QualificationsExperience with HW emulation or FPGA prototyping.For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/Days#J-18808-Ljbffr