Design Verification Engineer

hace 11 horas


valència, España JR Spain A tiempo completo

Social network you want to login/join with: Digital Hardware ASIC Verification Engineer (Spain / Egypt)Work Location:Remote (Spain or Egypt) | Hybrid optionalEmployment Type:Full-time Contractor via TechTeamzProject Area:High-speed communications and signal processing chipsWe're hiring aVerification Engineerto join a world-class team building next-gen digital IP. You’ll focus on creating reusable, scalable testbenches and validating complex SoCs using UVM methodology.Responsibilities:Create verification plans and testbenches using SystemVerilog/UVMDevelop assertions, coverage models, and reusable componentsWork closely with RTL designers and architects to resolve bugsParticipate in regressions, reviews, and continuous improvement Requirements:5+ years ASIC verification experienceDeep experience in SystemVerilog and UVM methodologyGood knowledge of simulation tools (e.g., VCS, Questa) and scripting (Python, Perl)Familiarity with formal verification or coverage-driven techniques is a plusIf you are interested send over your CV. #J-18808-Ljbffr


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