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Senior Digital Design Engineer

hace 2 meses

Barcelona, Barcelona, España Epsilonr A tiempo completo

About the Role:

Epsilonr is seeking a highly skilled Principal Digital Design Engineer to join our team. As a key member of our digital design team, you will be responsible for leading the design and support verification of digital architectures and functional blocks at the chip level.

Key Responsibilities:

  • Lead the design and support verification of digital architectures and functional blocks at the chip level.
  • Produce comprehensive technical documentation including specifications, block diagrams, and requirements for stakeholders.
  • Collaborate across departments and with stakeholders to define architectures, requirements, and resolve design, application, or test issues involving Digital/Analog Design, Application/Test Engineering, and Reliability/Operations.
  • Develop system and chip level simulation verification techniques and methodologies.
  • Execute Digital Design (RTL design) from concept to implementation for ASIC or FPGA.
  • Guide the development of test plans, test benches, and automated test cases for Digital Verification.
  • Manage synthesis, timing closure, and formal verification activities.
  • Develop scripts to automate design and verification processes.
  • Estimate and manage tasks and timelines to meet project schedules.

Qualifications:

  • PhD/BS/MS in Electrical Engineering with a focus on Digital Design/VLSI coursework.
  • Over 10 years of experience in ASIC or FPGA design and verification.
  • Expertise in power management DC-DC converters and control topologies such as PWM control, constant-on-time control, and voltage/current mode controls.
  • Proficiency in DV languages (Verilog, SystemVerilog, UVM) and automated regression testcase development, coverage metrics reporting/tracking.
  • Strong programming, scripting, and automation skills (C/C++, shell, Perl, TCL, Python, etc.).
  • Thorough understanding of the ASIC Digital Design Flow: Specification definition, RTL Verification, Synthesis, P&R, Gate-Level Verification, Power Estimation, ATPG Generation and Simulation, AMS Sims, etc.
  • Experience with industry-standard ASIC tools and flows (Digital Simulators, synthesis tools, DFT, LEC, STA, etc.).
  • Excellent written and verbal communication skills with a collaborative team spirit.
  • Desired experience with automotive standards/FuSA, I2C, I3C, SPI, USB, PMBUS, I2S, CAN, LIN, Embedded MCU (ARM/RISC V) designs, and SoC development.
  • Proficiency in Chinese communication is highly desired.