Senior Verification Expert for Analog Devices

hace 3 semanas


Valencia, Valencia, España Analog Devices, Inc. A tiempo completo

Analog Devices, Inc., a global leader in semiconductor technology, seeks a seasoned verification expert to join its team. The successful candidate will be responsible for leading the development and execution of comprehensive verification plans.

Salary: $140,000 - $180,000 per year

About the Role

We are looking for an experienced Staff Engineer, E2B Design Verification, to contribute to the success of our team. As a key member of our engineering team, you will be responsible for developing and executing comprehensive verification plans, including testbench architecture, test cases, and coverage metrics.

Responsibilities

  • Verification Planning: Develop and execute comprehensive verification plans, including testbench architecture, test cases, and coverage metrics.
  • Testbench Development: Create efficient and reusable testbench environments using industry-standard methodologies (e.g., UVM, OVM).
  • Test Case Generation: Generate directed and constrained random test cases to thoroughly exercise the design's functionality.
  • Coverage Analysis: Analyze coverage metrics and identify areas for improvement to ensure complete verification.
  • Debugging and Troubleshooting: Diagnose and resolve design issues, working closely with design engineers to identify root causes and propose solutions.
  • Mentorship: Provide guidance and mentorship to junior engineers, fostering a collaborative and learning environment.
  • Technical Leadership: Contribute to technical discussions, reviews, and decision-making processes.

Requirements

To be considered for this role, you must have:

  • Bachelor's degree in Electrical Engineering, Computer Science, or a related field.
  • Minimum 7 years of experience in design verification, with a strong understanding of hardware design and verification methodologies.
  • Proficiency in SystemVerilog, UVM, and other relevant verification languages and tools.
  • Experience with coverage driven verification.
  • Hands-on experience in developing, updating, and debugging of Verilog, SV-UVM, SOC level testbenches.
  • Strong problem-solving, analytical, and debugging skills.
  • Excellent communication and collaboration skills.

PREFERRED QUALIFICATIONS

If you have any of the following qualifications, it would be a plus:



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