Senior Digital SOC Verification Engineer
hace 1 mes
**Senior Digital SoC Verification Engineer - Semiconductor / Artificial Intelligence/ UVM / SystemVerilog**
- Are you experienced with SystemVerilog and UVM?
- Do you have experience with simulating C/C++ software and experience with any microprocessor based chips?
- Passionate about Neuromorphic computing/AI?
**If so, then this could be the one for you**
We’re working with a super exciting AI/Semiconductor company focused on developing ultra-efficient neuromorphic processors and they need a number of Senior Digital SoC Verification Engineers to join the team.
**This role can be worked onsite in Delft (Netherlands) or on a fully remote basis.**
**Sound good? Thought it might**
**What’s in it for you?**
You will receive an excellent base salary, take responsibility for delivery of fully verified RTL/gate level front-end design, as well as post-physical design netlists, for SoCs and Ips and will have a direct impact on products that will be implemented into the real-world.
All this whilst working within a diverse and multicultural team.
**What we look for in return is**:
- SoC design verification, SystemVerilog languages (UVM, SVA, SFC), low power verification (UPF methodology), software/hardware co-verification (SystemC/C/C++)
- Interfaced with designs/teams with embedded analog/mixed-signal design blocks
- Track record of being a hands-on, involved engineering team player who delivered successful silicon SoCs with embedded processor cores and proven IP
**Any of the following would be considered a plus**:
- Embedded SoC development, processes, delivery
- Insightfully hands-on with industry-standard EDA flows and methodologies
- Digital design with VHDL, Verilog, System Verilog
- Proven with range of scripting, automation processes.
**Please note: visa sponsorship is available for those relocating to Netherlands. If you work on a remote basis, you must have the Right to Work in the country you reside.**
European Recruitment Compensation and Benefits Survey
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