Advanced Circuits and Methods for Heterogeneous
hace 2 semanas
Función: - Design space exploration for architectures beyond a single chip. - Design tradeoffs: thermal, performance, power, etc. - Design and implementation of high performance interconnects.
- Empresa: UNIVERSIDAD POLITÉCNICA DE MADRID
- Nº de Plazas: 2
- Referencia: HRS2024/205
- Publicada el 13/5/2024
- Publicada hasta el 31/05/2024
- Tipo de Contrato: Indefinido
- Dedicación: Jornada completa
- Remuneración Bruta (euros/año): 25350
- Localidad: Madrid
- Provincia: Madrid
- Disponibilidad para viajar: Si
- Fecha de Incorporación: 01/07/2024
- Fecha de Finalización: 30/06/2026
Nível Académico
Master
- Titulación Académica
Engineering / Computer science
- Áreas tecnológicas
P-154 Electrónica
- Idiomas
Idioma: Español
Nível Lectura: Medio
Nível Escrito: Medio
Nível Conversación: Medio
Idioma: Inglés
Nível Lectura: Alto
Nível Escrito: Alto
Nível Conversación: Alto
- Otros
- **TAREAS/TASKS**:
Design space exploration for architectures beyond a single chip.
- Design tradeoffs: thermal, performance, power, etc.
- Design and implementation of high performance interconnects.
- Validation, verification, and testing of heterogeneous systems.
**HABILIDADES-CUALIFICACIONES/SKILLS-QUALIFICATIONS**:
Master's degree in Electrical and Electronics Engineering, Telecommunication with a major in Electronics, Computer Science, or similar.
**REQUERIMIENTOS ESPECIFICOS/SPECIFIC REQUIREMENTS**:
- Background on design of mixed-signal circuits.
- Valuable Knowledge of comercial design tools like Cadence / Synopsys.
- Competence in digital architectures and digital system design with HDLs (Verilog or VHDL).
- Knowledge heterogeneous integration or chiplet design.
**BENEFICIOS/BENEFITS**:
The contract includes a gross salary of 25350 € and full social benefits in Spain. Conference,summer school and workshop registration fees will be also covered.
The contracted researcher will pursue an industrial PhD in Electrical and Electronic engineering in ajoint program with INDRA, an international Spanish-based company, within the project “ChairUPM-INDRA in microelectronics”.
**CRITERIOS Y PROCESO DE SELECCION/ELIGIBILITY CRITERIA AND SELECTION PROCESS**:
Se aplican las pautas establecidas en el proceso de selección del nuevo Reglamento para el proceso de selección ycontratación del personal investigador, personal técnico y personal gestor relacionado con la investigación de laUniversidad Politécnica de Madrid, aprobado en la UPM.
- Academic records at bachelor's and master's levels.
- Previous experience in the design of electronic circuits.
- Motivation for doing a PhD and abilities for dissemination, writing scientific papers, andpresenting to public audiences, among others.
**COMENTARIOS ADICIONALES/ADDITIONAL COMMENTS**:
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