Staff Engineer, Design Verification Engineering

hace 3 semanas

Valencia, España Analog Devices A tiempo completo

Analog Devices (NASDAQ: ADI) designs and manufactures semiconductor products and solutions. We enable our customers to interpret the world around us by intelligently bridging the physical and digital worlds with unmatched technologies that sense, measure and connect.

**Responsibilities**:

- Develop System Verilog UVM simulation environments, infrastructure, and verification plans at both full chip, subsystem, and standalone block level
- Define block and chip level verification strategies and/or verification plans based on design requirements and architecture
- Develop directed, random, and constrained random test suites across chip hierarchies
- Create, simulate, and debug constrained random and/or directed cases written to verify complex signal processing designs based on the verification plans
- Implement Coverage driven verification methodologies. Come up with functional coverage, assertions, and other metrics to track progress and completeness of verification effort
- Plan and conduct verification reviews, measure and analyze coverage results, and take necessary actions to fill the coverage gaps
- Run RTL and gate simulations based on use case scenarios, and debug failures
- Work with senior DV engineer(s) to assess new tools and methods to improve existing verification methodologies
- Work with global verification teams in identifying and addressing issues, and develop solutions to achieve scheduled DV commitments

**Qualifications**:
Required:

- BS with 4+ years or MS with 3+ years of experience in digital verification. Degree should be in EE or CS or related field.
- Knowledge of standard ASIC verification flows including testbench development using UVM methodology, integrating C models using DPI, simulation, assertions, functional pattern generation for post silicon testing
- Knowledge of testbench automation, bug tracking, and regression mechanisms
- Knowledge of metric driven DV methodology, formal verification, coverage and coverage analysis
- Excellent knowledge of Verilog, System Verilog and UVM
- Experience with scripting languages such as Python, Tcl, Perl
- Good knowledge of C / C++, matlab
- Self-motivated team player with the ability to work independently and interface effectively with engineers across divisions and remote locations

Desired:

- Experience with embedded ARM (or similar RISC) processors and C/assembly coding for test development
- Experience in verification of mixed signal designs and modeling of analog functions
- Knowledge of digital signal processing
- Knowledge of power gating and low power methodologies
- For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process._
- Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group._

Job Req Type:
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