Senior Asic Design
hace 1 semana
We offer a permanent contract with a competitive salary and career opportunity in a growing company with global coverage and ambition.
There's still a lot of work to be done. We need best in class optical designers, software, parallel computing, heterogeneous computing and digital image processing experts.We'd like to hear from you If you have experience or a PhD in one of the following fields:
Computer Science, Telecommunication Engineering, Parallel Computing, Electronic Engineering, Physics, Mathematics.
Experienced Microelectronics design and verification engineer to develop an innovative low-power consumption ASIC to deliver high-quality depth maps and images by processing real-time video frames captured by apiCAM, our leading state-of the art 3D camera.
apiCAM offers simultaneously 2D and 3D images with a single lens, currently at 30 fps (frames per second), higher in the future.
apiCAM is available in commercial products for Medical Imaging, Robotics, Industry 4.0 and aims to be in the next generations of XR-glasses, Tablets, PCs and Smartphones.
You will join the our Algorithms team to improve and implement state-of-the-art depth and imaging algorithms efficiently on FPGAs and finally within an ASIC.
_Responsibilities_
- Integration and Formal Verification of a complex digital design composed by multiple HDLblocks developed by members of our Digital Design and Verification Groups as well as IPblocks from third parties.
- Porting our current algorithms to an ASIC.
- Definition of the hardwaresoftware architecture that guarantees the lowest power consumption, as well as maximum speed and precision in the calculations.
- Development of the hardware system using Xilinx development tools for FPGAs.
- RTL coding, simulation and verification.
- Choice of the target digital process. RTL porting to the targeted ASICprocess.
- Development of the control software for our camera.
- C/C++ developments for embedded microprocessors (within FPGAs and ASICs).
- Development of techniques to reduce computational costs.
_Requirements_
- Bachelor, Master or PhD in Telecommunication, Electronics, Computer Science or related fields.
- 5+ years' experience working on the design of complex FPGA and ASIC systems.
- Experience in RISC-V and/or ARM embedded architectures.
- Extensive experience in HDLs-Hardware Description Languages (Verilog and/or VHDL). Ability to integrate third party IPs.
- Development of testbenches for the verification of digital designs (Verilog, SystemVerilog, UVM ).
- Version control software such as Git or SVN.
- Signal processing in software such as Matlab, Python and/or C++.
- Analysis of complex algorithms and problems to find creative and innovative solutions.
- Experience manufacturing digitalASICs in silicon.
- Motivated, and willing to take a leading role within a highly motivated design team and to face big challenges such as the design, verification, and manufacturing of a complex image processing ASIC from the very beginning.
_Desirable_
- High-Performance Computing (HPC) and lowpower consumption architectures for consumer appliances.
- Knowledge of MIPI, USB 3.0, Ethernet and other camerarelated communication protocols.
- Knowledge of HLS (High-Level Synthesis) design using Vivado.
- Knowledge of Image acquisition, 3Dscanning and Computer Vision paradigms: Stereovision, Structure from Motion (SfM), SLAM (Simultaneous Localization and Mapping),
- Knowledge of open source libraries: OpenCV, Open3D, Point Cloud Library,
_We offer_
- Competitive salary according to your experience.
- Flexible working hours (1 teleworking day per week).
- Flexible compensation plan (restaurant tickets, transport, childcare, health insurance ).
- Professional career plan within the company. Lifelong learning.
- Dynamic startup environment.
- Fix contract and professional stability within a demanding but friendly working environment.
- Join us _
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