Senior Digital Design Engineer

hace 4 días

Barcelona, España Beagle A tiempo completo

ROLE: Senior Digital Design Engineer – Memory Subsystems Si desea saber un poco más sobre esta oportunidad, o está considerando presentar su candidatura, por favor, lea la siguiente información del puesto. LOCATION: Barcelona, Spain SALARY: Negotiable DURATION: Permanent We are looking for a Senior Digital Design Engineer to design and develop high-performance memory subsystems for modern SoCs. You will work within the Memory Design Team and collaborate closely with other engineers to create efficient and robust memory architectures. Responsibilities: Define, design, and implement memory controllers and subsystems (DDR, HBM) Develop and verify RTL (Verilog or VHDL) for memory blocks Work with timing constraints and perform block-level testing Integrate memory IPs into SoC environments Collaborate with cross-functional teams to ensure coherency and high-performance operation Required: 8+ years of industrial experience in digital design Strong knowledge of DDR or HBM memories Proven experience designing or integrating memory controllers Hands-on experience with AXI protocol Proficiency xohynlm in RTL design (Verilog or VHDL) Experience with timing constraints and basic block-level testing Desired: Master's degree or PhD Scripting skills (Python, Perl, Bash, TCL) Experience with version control (git, svn) Knowledge of coherency concepts and protocols Experience defining memory maps

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    hace 2 semanas

    Barcelona, España Beagle A tiempo completo

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    hace 2 días

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    Barcelona, España Beagle A tiempo completo

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    hace 5 días

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    hace 6 días

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    hace 2 semanas

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