Digital Design Supervisor

Monolithic Power Systems, Inc. (MPS) is one of the fastest growing companies in the Semiconductor industry. We are worldwide technical leaders in Integrated Power Semiconductors and Systems Power delivery architectures. At MPS, we cultivate creativity, are passionate about sustainability, and are committed to providing leading-edge products and innovation to our customers. Our portfolio of technology helps power our world ---come join our team and see how YOU can make a difference.

Job Description
Job Summary:
A Digital Design Supervisor will lead, train and mentor the MPS Digital Design team and will define and lead the development of the Digital Design framework and infrastructure of complex digital and mixed-signal ICs utilizing leading edge technologies with industry standard ASIC tools. Products to be designed/verified may include power management, signal management and mixed signal functions.

MPS products include: switching regulators, sensors, motor control, display drivers, audio amplifiers and power management ICs for fast-growing portable and non-portable markets such as notebooks, cell phones, telecom, digital camera, automobile and network equipment.

Essential Functions

• Lead, supervise, mentor and train the MPS Digital Design Team
• Supervision of multiple projects to meet the different quality, deliverables and the schedule
• Be part of the Digital Design recruitment process
• Digital Architecture Definition and Documentation.
• RTL Design, debugging and Verification.
• Verification metrics analysis.
• IP Definition, Development, Integration and Verification.
• Synthesis: timing, input/output and DFT constraints definition. Results and Reports analysis.
• LEC: constraints definition and debugging. Results and Reports analysis.
• P&R support with MMMC definition and debugging.
• DFT Implementation, debugging and reports analysis.
• ATPG Generation and Simulation.
• Gate-Level Verification.
• Power Simulations and Analysis.
• Timing Analysis and Sign-off.
• AMS Verification support.
• Post-Silicon Validation and Characterization support.
• Close interaction and collaboration with Analog Design, Analog Layout, Digital Design Engineers, Digital Verification and Digital Physical Engineers.

Qualifications

• BSEE + 12 years of experience, MSEE + 8 years of experience in ASIC Mixed-Signal design.
• Has the ability to work independently and collaborate with other teams/departments.
• Solid knowledge of the full ASIC development and Silicon fabrication process.
• Excellent RTL Verilog or System Verilog coding skills.
• Knowledge of standard Digital Verification languages (System Verilog, UVM) and metrics.
• Solid knowledge and experience working through the entire Digital Design Flow: Specification definition, RTL Verification, Synthesis, P&R, Gate-Level Verification, Power Estimation, ATPG Generation and Simulation, AMS Sims, etc.
• Excellent Knowledge & Use of industry standard ASIC tools/flow for daily work: Digital Simulators, synthesis tools, DFT, LEC, STA, etc.
• Excellent written/verbal communication skills and strong teamwork/collaboration.
• Very good leadership abilities to handle multiple projects and a small group of Digital Designers.

• Knowledge/Experience with the following is a plus:

• Automotive standards

• Embedded designs and/or firmware development. ARM Designs
• Knowledge of power management industry/applications
• I2C, I3C, SPI, USB, PMBUS
• FPGA design and validation
• GitLab
• Scripting and automation languages like TCL, Python and C/C++

Location:
Barcelona, Spain

A valid disability certificate will be considered a plus as part of our commitment to workplace inclusion and diversity.
Monolithic Power Systems, Inc. (MPS) is an Equal Opportunity Employer and embraces diversity in our employee population. It is the policy of MPS to provide equal opportunity to all qualified applicants and employees without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, protected veteran status or special disabled veteran, marital status, pregnancy, genetic information, or any other legally protected status.