Fpga Research Engineer for Risc-v Emulation

**Job Reference**:

- 51_25_CS_HWE_RE1

**Position**:

- FPGA Research Engineer for RISC-V Emulation (RE1-2)

**Closing Date**:

- Friday, 31 January, 2025

**Reference**: 51_25_CS_HWE_RE1

**Job title**: FPGA Research Engineer for RISC-V Emulation (RE1-2)

**About BSC**
- The Barcelona Supercomputing Center - Centro Nacional de Supercomputación (BSC-CNS) is the leading supercomputing center in Spain. It houses MareNostrum, one of the most powerful supercomputers in Europe, was a founding and hosting member of the former European HPC infrastructure PRACE (Partnership for Advanced Computing in Europe), and is now hosting entity for EuroHPC JU, the Joint Undertaking that leads large-scale investments and HPC provision in Europe. The mission of BSC is to research, develop and manage information technologies in order to facilitate scientific progress. BSC combines HPC service provision and R&D into both computer and computational science (life, earth and engineering sciences) under one roof, and currently has over 1000 staff from 60 countries.

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We promote Equity, Diversity and Inclusion, fostering an environment where each and every one of us is appreciated for who we are, regardless of our differences.

**Context And Mission**
- We are seeking a research engineer to join our FPGA Technologies Group and contribute to the emulation of RISC-V based designs at FPGA level.

**Key Duties**- Design and develop the necessary hardware or software components
- Conduct research on understanding the state-of-the-art in the related area
- Write reports and do presentations based on project need

**Requirements**:

- Education
- Bachelor/Master/Ph.D.
- Essential Knowledge and Professional Experience
- 0-5 years of experience in FPGA design
- Deep hands-on experience with FPGAs hardware, software, and toolchain
- AMD/Xilinx FPGA Toolchain: Vivado, Vitis, SDSOC on Alveo, Versal, or Ultrasclae+
- Peripheral IPs: DDR and HBM, PCIe, CXL, Ethernet, DMA, UART, nVME, etc
- Hardware/Software co-design experience: FPGA and Processor
- HDL and HLS: VHDL, Verilog, SystemVerilog
- Processor micro-architecture based on risc-v and experience with emulating such designs on FPGAs
- System software and Operating System flow on FPGA: Linux kernel porting, device drivers, device tree configuration, bootloader configuration (good understanding of Linux Kernel)
- Debugging and Troubleshooting complex hardware designs (JTAG, ILA, etc) and optimizing the FPGA designs at synthesis, place and route, timing closure, verification, validation
- Competences
- Self-control
- Proactive
- Responsible
- Quickly adaptable to new topics

**Conditions**
- The position will be located at BSC within the Computer Sciences Department
- We offer a full-time contract (37.5h/week), a good working environment, a highly stimulating environment with state-of-the-art infrastructure, flexible working hours, extensive training plan, restaurant tickets, private health insurance, support to the relocation procedures
- Duration: Open-ended contract due to technical and scientific activities linked to the project and budget duration
- Holidays: 23 paid vacation days plus 24th and 31st of December per our collective agreement
- Starting date: 01/02/2025

**Applications procedure and process**
- A full CV in English including contact details
- A Cover Letter with a statement of interest in English, including two contacts for further references - Applications without this document will not be considered

At BSC we are seeking continuous improvement in our recruitment processes, for any suggestions or feedback/complaints about our Recruitment Processes, please contact recruitment [at] bsc [dot] es.

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**Deadline**

**OTM-R principles for selection processes**

BSC-CNS is an equal opportunity employer committed to diversity and inclusion. We are pleased to consider all qualified applicants for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability or any other basis protected by applicable state or local law.
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