Senior Analog/mixed-signal Layout and Methodology
hace 2 días
37256BR
CANADA - Canada, CANADA - Ontario - Markham, CANADA - Ontario - Mississauga
**Job Description and Requirements**
**Senior Analog/Mixed-Signal Layout and Methodology Engineer**
As part of the Mixed Signal IP Methodology Team, you will be working with the world’s most advanced technologies for chip design using best-in-class Synopsys tools. As a member of the Layout Design and Methodology team, you will be working with local and global teams in developing layout for complex mixed-signal designs in the latest technology nodes. In your role you will be responsible for taking on top-level block ownership with technical expertise and skills. There will also be opportunities to act as analog layout technical lead where you will be coordinating with other team members in designing and reviewing layout.
You will be part of an advanced physical design team developing full custom analog and ASIC layout of high-speed integrated circuits. Your role will be to examine, improve and innovate layout methodologies in a very challenging environment and with tremendous learning and growth potential. Our environment is best in class with a full suite of IC design tools supplemented by custom, in-house tools supported by an experienced software/CAD team
Ideal background would include hands-on analog layout or ASIC physical design experience with advance technology nodes.
**Key** **Responsibilities**:
- Propose innovative methodologies to speed up layout without loss of quality
- Work with cross teams in the enablement of advanced technology nodes which involves planning, collaboration, and coordination ensuring that geographically distributed teams are well-aligned
- Measure project and performance using appropriate systems, tools and techniques
- Establish and maintain relationships with cross-functional teams, internal and external customers
- Create and maintain comprehensive methodology and workflow documentation
**Key Qualifications**:
- Familiarity with physical design of analog and mixed signal CMOS circuits
- Exposure and knowledge of the full design cycle from RTL to GDSII, including chip level
- Excellent communication skills, ability to think and communicate at different levels of abstraction, with peer groups as well as customers
- Solid organizational skills including attention to detail and multi-tasking skills
- Autonomous, timely decision maker and able to cope with interrupts
- Experience with advanced FinFET nodes, TSMC 16 nanometer and below
- Exposure to SERDES design architectures, and layout
- Experience with Design tool(s): Custom Compiler, Cadence Virtuoso or equivalent
- Verification tools: ICV, Calibre
- Experience in working with Jira/Atlassian (or other such) toolsPreferred Experience and Requirements:
- MSEE or BSEE with a minimum of 2 years of related experience
- Previous analog layout or ASIC physical design experience
- Solid understanding of digital / mixed signal flows and SOC integration challenges
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
**Stay Connected**:Join our Talent Community
**Job Category**
Engineering
**Country**
Canada
**Job Subcategory**
Layout Design
**Hire Type**
Employee
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