Research Engineer

**Job Reference**: - 391_25_CS_UNCORE_RE1 **Position**: - Research Engineer - Cache Hierarchy and Interconnects (RE1) **Closing Date**: - Thursday, 05 June, 2025 **Reference**: 391_25_CS_UNCORE_RE1 **Job title**: Research Engineer - Cache Hierarchy and Interconnects (RE1) **About BSC** - The Barcelona Supercomputing Center - Centro Nacional de Supercomputación (BSC-CNS) is the leading supercomputing center in Spain. It houses MareNostrum, one of the most powerful supercomputers in Europe, was a founding and hosting member of the former European HPC infrastructure PRACE (Partnership for Advanced Computing in Europe), and is now hosting entity for EuroHPC JU, the Joint Undertaking that leads large-scale investments and HPC provision in Europe. The mission of BSC is to research, develop and manage information technologies in order to facilitate scientific progress. BSC combines HPC service provision and R&D into both computer and computational science (life, earth and engineering sciences) under one roof, and currently has over 1000 staff from 60 countries. Look at the BSC experience: BSC-CNS YouTube Channel Let's stay connected with BSC Folks We promote Equity, Diversity and Inclusion, fostering an environment where each and every one of us is appreciated for who we are, regardless of our differences. **Context And Mission** - Applications are invited for an engineer in High Performance Computing (HPC) architectures at the Barcelona Supercomputing Center (BSC). BSC intends to pave the way to the future low-power European processor for Exascale in the context of multiple architecture initiatives (Zettascale, DARE, EPI, eProcessor, EUPILOT, etc.). **Key Duties** - Implement novel features in the cache hierarchy and the on-chip interconnection network of RISC-V based HPCP processors - Analyze the performance of RISC-V based HPC processors, with special emphasis on the cache hierarchy and the on-chip interconnection network - Identify and solve performance bottlenecks in the cache hierarchy and the on-chip interconnection network **Requirements**: - Education - BS or MS in Computer Science, Computer Engineering or Electrical Engineering. Previous industrial experience is a big plus. - Essential Knowledge and Professional Experience - Computer Architecture: microarchitecture, resource sharing in multicores, cache hierarchy, interconnection network. - Programming: C/C++, Assembler, SystemVerilog, Verilog, VHDL, etc. - Additional Knowledge and Professional Experience - Excellent written and verbal communication skills in English. - Competences - Ability to take initiative, prioritize and work under set deadlines pressure. - Ability to work independently and in a team.Capacity to interact and build strong relations with other research groups.**Conditions** - The position will be located at BSC within the Computer Sciences Department - We offer a full-time contract (37.5h/week), a good working environment, a highly stimulating environment with state-of-the-art infrastructure, flexible working hours, extensive training plan, restaurant tickets, private health insurance, support to the relocation procedures - Duration: Open-ended contract due to technical and scientific activities linked to the project and budget duration - Holidays: 23 paid vacation days plus 24th and 31st of December per our collective agreement - Starting date: 21/06/2025 **Applications procedure and process** - A full CV in English including contact details - A cover/motivation letter with a statement of interest in English, clearly specifying for which specific area and topics the applicant wishes to be considered. Additionally, two references for further contacts must be included. Applications without this document will not be considered. **Development of the recruitment process** The selection will be carried out through a competitive examination system ("Concurso-Oposición"). The recruitment process consists of two phases: - **Curriculum Analysis**: Evaluation of previous experience and/or scientific history, degree, training, and other professional information relevant to the position. - **_40 points_**: The recruitment panel will be composed of at least three people, ensuring at least 25% representation of women. The panel will make a final decision, and all individuals who participated in the interview phase will receive feedback with details on the acceptance or rejection of their profile. At BSC, we seek continuous improvement in our recruitment processes. For any suggestions or comments/complaints about our recruitment processes, please contact recruitment [at] bsc [dot] es. For more information, please follow this link. **Deadline** **OTM-R principles for selection processes** BSC-CNS is an equal opportunity employer committed to diversity and inclusion. We are pleased to consider all qualified applicants for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national orig