SoC Physical Layout Architect

At OpenChip we are building the future of hardware. Our mission is to revolutionize semiconductor design through open‑source principles, collaboration and radical innovation. We develop high‑performance Systems‑on‑Chip (SoCs) that power tomorrow's technologies. Our team is made up of brilliant, creative and passionate people and we are looking for a...

A leading technology firm in Italy is seeking a Functional Verification Principal Engineer to interface with various teams to ensure optimal performance of systems. Key responsibilities include developing test plans, executing verification environments, and mentoring engineers. The ideal candidate will have a Master's Degree and over 15 years of experience...

A technology firm in Rome seeks a Senior Functional Verification Engineer who will interface with architecture, design, physical implementation, and software teams. You will develop verification environments and execute verification plans using SystemVerilog and UVM. The ideal candidate has a Master’s degree, 7+ years of relevant experience, and strong...

IT Architect Are you curious and ready to accept a new challenge in your career? Are you eager to join a dynamic company and bring innovation through your work and skills? Prometeia offers you opportunities for growth and training in a Group with over 1000 professionals working for more than 500 clients in 20 countries around the world. Among the European...

RomaEUR 60.000 - 85.000Senior R&D Engineer - System Architecture (Italy based)Join to apply for the Senior R&D Engineer - System Architecture (Italy based) role at Axelera AI2 days ago Be among the first 25 applicantsAbout UsAxelera AI is not your regular deep-tech startup. We are creating the next‑generation AI platform to support anyone who wants to help...

The Role : As a Senior Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW / SW Co-Debug Simulation Acceleration support. Key Responsibilities : Reading and...

The Role As a Functional Verification Principal Engineer you will be interfacing with architecture de‑sign physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work will involve high‑level modelling UVM HW / SW Co‑Debug Simulation Acceleration support. Key Responsibilities Reading...