Research Engineer
hace 3 semanas
Job Reference
648_24_CS_Int_RE1
Position
Research Engineer - RTL Integration (RE1)
Closing Date
Thursday, 31 October, 2024
Reference: 648_24_CS_Int_RE1
Job title: Research Engineer - RTL Integration (RE1)
About BSC
The Barcelona Supercomputing Center - Centro Nacional de Supercomputación (BSC-CNS) is the leading supercomputing center in Spain. It houses Mare Nostrum, one of the most powerful supercomputers in Europe, was a founding and hosting member of the former European HPC infrastructure PRACE (Partnership for Advanced Computing in Europe), and is now hosting entity for Euro HPC JU, the Joint Undertaking that leads large-scale investments and HPC provision in Europe. The mission of BSC is to research, develop and manage information technologies in order to facilitate scientific progress. BSC combines HPC service provision and R&D into both computer and computational science (life, earth and engineering sciences) under one roof, and currently has over 1000 staff from 60 countries.
Look at the BSC experience:
BSC-CNS You Tube Channel
Let's stay connected with BSC Folks
We are particularly interested for this role in the strengths and lived experiences of women and underrepresented groups to help us avoid perpetuating biases and oversights in science and IT research. In instances of equal merit, the incorporation of the under-represented sex will be favoured.
We promote Equity, Diversity and Inclusion, fostering an environment where each and every one of us is appreciated for who we are, regardless of our differences.
If you consider that you do not meet all the requirements, we encourage you to continue applying for the job offer. We value diversity of experiences and skills, and you could bring unique perspectives to our team.
Context And Mission
Applications are invited for an engineer in High Performance Computing (HPC) architectures at the Barcelona Supercomputing Center (BSC). BSC intends to pave the way to the future low-power European processor for Exascale in the context of multiple architecture initiatives, such as EPI, Lenovo, Intel and Zettascale Lab.
Key Duties
- Design and Implement the components required to assemble a RISC-V-based HPC system that meets the specified performance targets.
- Analyze the performance of a RISC-V based HPC processor system, with special emphasis on the top-level integration of the constituent modules and the interconnection to external peripherals.
- Design and implement the necessary HW and SW components to support the simulation and debugging of a RISC-V-based HPC system.
Requirements
- Education
- BS or MS in Computer Science, Computer Engineering or Electrical Engineering. Previous industrial experience is a big plus.
- Essential Knowledge and Professional Experience
- Computer Architecture: microarchitecture, resource sharing in multicores, cache hierarchy, interconnection network.
- Performance Analysis and Tuning of parallel applications.
- Programming: HD languages such as System Verilog, Verilog and VHDL. Low-level software languages such as C/C++ and Assembly Language.
- Additional Knowledge and Professional Experience
- Excellent written and verbal communication skills in English.
- Competences
- Ability to take initiative, prioritize and work under set deadlines pressure.
- Ability to work independently and in a team.
Ability to interact and build strong relationships with other research groups.
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Conditions
- The position will be located at BSC within the Computer Sciences Department
- We offer a full-time contract (37.5h/week), a good working environment, a highly stimulating environment with state-of-the-art infrastructure, flexible working hours, extensive training plan, restaurant tickets, private health insurance, support to the relocation procedures
- Duration: Open-ended contract due to technical and scientific activities linked to the project and budget duration
- Holidays: 23 paid vacation days plus 24th and 31st of December per our collective agreement
- Salary: we offer a competitive salary commensurate with the qualifications and experience of the candidate and according to the cost of living in Barcelona
- Starting date: 01/09/2024
Applications procedure and process
All applications must be made through BSC website and contain:
- A full CV in English including contact details
- A Cover Letter with a statement of interest in English, including two contacts for further references - Applications without this document will not be considered
In accordance with the OTM-R principles, a gender-balanced recruitment panel is formed for every vacancy at the beginning of the process. After reviewing the content of the applications, the panel will start the interviews, with at least one technical and one administrative interview. A profile questionnaire as well as a technical exercise may be required during the process.
The panel will make a final decision and all candidates who had contacts with them will receive a feedback with details on the acceptance or rejection of their profile.
At BSC we are seeking continuous improvement in our recruitment processes, for any suggestions or feedback/complaints about our Recruitment Processes, please contact recruitment (at) bsc (dot) es.
For more information follow this link
Deadline
The vacancy will remain open until a suitable candidate has been hired. Applications will be regularly reviewed and potential candidates will be contacted.
OTM-R principles for selection processes
BSC-CNS is committed to the principles of the Code of Conduct for the Recruitment of Researchers of the European Commission and the Open, Transparent and Merit-based Recruitment principles (OTM-R). This is applied for any potential candidate in all our processes, for example by creating gender-balanced recruitment panels and recognizing career breaks etc.
BSC-CNS is an equal opportunity employer committed to diversity and inclusion. We are pleased to consider all qualified applicants for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability or any other basis protected by applicable state or local law.
For more information follow this link
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