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Cutting-Edge FPGA Architect for Next-Generation 5G Technology

hace 2 semanas

Ourense, Orense, España beBee Careers A tiempo completo
5G FPGA Architect Role

We are seeking a highly skilled and innovative FPGA Architect to join our advanced communication systems team, focusing on the implementation of next-generation 5G technology.

The ideal candidate will be responsible for architecting, developing, and integrating cutting-edge signal processing blocks on FPGA platforms. Working in close collaboration with DSP engineers, the FPGA Architect will transform high-level models into efficient RTL and VHDL code using High-Level Synthesis (HLS) tools, drive hardware integration, and play a key role in selecting the optimal FPGA platform to meet performance and integration requirements.

Main Responsibilities:

  • Design and implement physical layer processing chains for 5G systems on FPGA platforms.
  • Translate MATLAB / C++ reference models, provided by DSP engineers, into synthesizable RTL and VHDL code using HLS tools.
  • Evaluate and select the most suitable FPGA platform based on architectural, performance, and integration constraints.
  • Optimize hardware architectures for real-time signal processing in both time and frequency domains.
  • Perform simulation, synthesis, place-and-route, and timing closure of FPGA designs.
  • Integrate and validate firmware components from both internal and third-party sources.
  • Conduct functional and performance verification, including system-level testing on hardware platforms.
  • Collaborate closely with system architects, software engineers, and hardware teams to ensure cohesive integration and optimal performance.
  • Document architectural decisions, design specifications, and test plans.
Requirements

To succeed in this role, you will need:

  • A Master's or PhD degree in Electrical Engineering, Computer Engineering, or a related field.
  • At least 5 years of experience in FPGA design, ideally in wireless communications or high-performance digital signal processing.
  • Proficiency in RTL design using VHDL or Verilog.
  • Hands-on experience with HLS tools (e.g., Xilinx Vitis HLS, Intel HLS Compiler).
  • Experience in evaluating and selecting FPGA platforms (e.g., Xilinx Zynq Ultrascale+, Intel Stratix).
  • Familiarity with MATLAB and C++ for algorithm modeling and verification.
  • A strong understanding of JESD204 or similar high-speed serial interfaces.
  • Experience with FPGA development environments (Vivado, Quartus, ModelSim, etc.).
Benefits

We offer a dynamic, multidisciplinary, and multicultural environment that will allow you to boost your professional career. You will have the chance to work in a fast-paced startup with big goals, where you can progress both personally and professionally.

We promote good physical and mental health, with a health insurance, fresh fruit in the office, and the possibility of sharing the cost of bicycle transport or gyms. Our culture is based on embracing openness, welcoming multicultural talent, being respectful to everybody, and being open to exchange ideas. We have a flat and transparent organizational structure, schedule flexibility, and a flexible compensation package that includes tax benefits and training programs.