Principal Engineer for Mixed Signal SOC Verification
hace 1 semana
The Principal Engineer for Mixed Signal SOC Verification will be responsible for the verification of key digital blocks in differentiated mixed signal SOCs targeted for the consumer market. This role requires a strong understanding of industry-standard methodologies like UVM and constrained random approach to achieve verification goals. The ideal candidate will have experience in developing UVM-based testbench infrastructure, functional cover point development, code coverage analysis/closure, and assertion development. Additionally, they should have excellent debug and problem-solving skills, as well as the ability to integrate the block-level testbench at the SOC level and verify SOC integration.
Responsibilities:
- Develop UVM-based testbench infrastructure and functional cover points
- Conduct code coverage analysis and closure
- Use constrained random approach and formal verification to achieve verification goals
- Debug and solve complex verification issues
- Integrate block-level testbench at SOC level
Requirements:
- Electronic Engineering/Computer Engineering degree with 10+ years of progressive experience in Verification
- Demonstrated experience in developing UVM-based testbench infrastructure, functional cover point development, and code coverage analysis/closure
- Strong understanding and experience of Verilog and System Verilog
- Excellent debug and problem-solving skills
- Experience with both IP and SOC level verification
About the Company:
Analog Devices, Inc. is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. The company combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world.
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