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Analog Methodology Engineer, Principal

hace 2 meses

Madrid, Madrid, España Synopsys A tiempo completo

**Job Summary**

At Synopsys, we are seeking a highly skilled Analog Methodology Engineer, Principal to join our team. As a key member of our Solution IP group, you will play a critical role in accelerating prototyping, software development, and integration of IP into SoCs.

**Key Responsibilities**

  • Develop and implement analog methodology and design flows to support high-performance computing (HPC) demand
  • Collaborate with cross-functional teams of analog and mixed-signal circuit designers to design and develop analog IP
  • Design and develop transistor-level simulations, reliability analysis, and static timing analysis (STA) tools
  • Develop and maintain a deep understanding of mixed-signal circuit design principles and silicon IP release requirements
  • Lead and train junior engineers to become experts in new methodologies
  • Provide automation for rapid and dynamic design needs using programming languages such as Python, Perl, TCL, and C/C++

**Requirements**

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or similar technical field
  • BSEE degree and 18-25 years of experience in IC design, or MSEE (or PhD) with 15-18 years of experience
  • Extensive programming skills in languages such as Python, Perl, TCL, and C/C++
  • Deep knowledge of Analog & Mixed-Signal circuit design
  • Proficiency with spice simulators including HSPICE, PrimeSim/FineSim, and XA
  • Deep knowledge on DC/AC/Transient, Cross corners PVT, Static & Dynamic CCK, Equivalency checks, Aging, EMIR/SHE Reliability analysis, Monte Carlo simulations
  • Strong team player with good written and verbal communication skills, self-motivated, thorough design styles, detail-oriented, and work with multiple functional teams with good engineering practices
  • Understanding of behavioral Verilog models & experience in SystemVerilog for AMS circuits
  • Prior experience on products/test chips bring up, lab debug, and simulations to silicon correlation is highly desirable
  • Experience with STA and cell characterization such as Nanotime, Primetime, SiliconSmart
  • Candidate with Machine Learning paradigms/techniques understanding with knowledge of applying it in modeling, circuit design flow & simulations is desirable

**What We Offer**

  • Opportunity to work with a broad IP portfolio and exceptional EDA presence
  • Collaborative and dynamic work environment
  • Professional growth and development opportunities