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Senior Analog Design Engineer

hace 3 semanas


Madrid, España Beagle A tiempo completo

ROLE: Senior Mixed-Signal IC Design Engineer ¿Está considerando presentar su candidatura para este trabajo? Compruebe todos los detalles en esta descripción del puesto y luego haga clic en "Solicitar". LOCATION: Madrid, Spain SALARY: Negotiable DURATION: Permanent An exciting opportunity to join a high-tech R&D team in Madrid, developing advanced analog and mixed-signal ICs in leading-edge CMOS technologies. This role offers the chance to work across the full design flow — from concept and system-level definition through to silicon validation — on innovative products used in next-generation systems. Key Responsibilities: • Define and specify analog and mixed-signal blocks, including ADCs, DACs, PLLs, data interfaces, and optoelectronic circuits. • Take ownership of AMS design from schematic to full verification in sub-nanometric CMOS processes (65nm/28nm and below). • Establish layout guidelines, collaborate closely with layout engineers, and review their work to ensure design integrity. • Partner with test engineers on defining and executing test plans, analyzing lab results, and correlating with simulations. • Work alongside system-level engineers to create behavioural models of AMS blocks for system simulations and mixed-signal verification. • Support the integration of analog subsystems into complex SoCs that include significant digital processing. • Drive innovation and R&D by exploring new architectures, contributing to future product concepts, and supporting patent activity. • Document and present design progress and results in internal technical reviews and meetings. Requirements: • MSc or PhD in Electronics, Electrical, or Computer Engineering (or a related discipline). • 5+ years of experience in analog and mixed-signal IC design. • Proven experience delivering silicon-proven designs through all development phases — from definition and design to characterization and productization. • Hands-on experience designing full-custom analog IP in sub-nanometric CMOS (65nm/28nm or below). • Proficient with EDA tools such as Cadence or Synopsys for AMS design and verification. • Strong understanding of analog layout techniques, including the ability to guide and review layout work. xsgfvud • Excellent communication skills in English (both written and verbal).