Hw Engineer for Asic/soc Design, Microprocessor

Description_

The developed solutions will be based on:

- ARM microcontrollers.
- FPGAs.
- 65 nm ASICs/SoCs implementing open ISAs such as RISC-V.

It will be very valuable to have knowledge in this field following the design and implementation methodologies according to the selected implementation platform.

Furthermore, the knowledge in the design and implementation in:

- VHDL,
- Verilog,
- System Verilog,

of interfaces like AMBA, AXI and of signal processing modules like filters, interpolators, FFTs, etc. will be considered key for this position.

The design of testbenches and the simulation of RTL designs using simulators like Modelsim or Verilator will be part of the job.

The experience in the use of tools like Cadence or Fusion Compiler of Synopsys for digital design will be appreciated as well.

**Offered**:
Incorporation in a company at the forefront of technological knowledge, and with a clear vocation of service to society. Opportunities for growth and professional development, and a good work environment based on trust and teamwork.

Remuneration:
Remuneration will be commensurate with experience.

Start date:
Immediate.

Schedule:
winter: 7.75 hours per day. July and August: 6 hours a day (continuous).

Flexible hours: check-in between 8:00 and 9:30, check-out from 4:15 p.m.

Possibility of continuous day on Friday.

Teleworking:
Option to telework 1 day per week.

Holidays

23 days + Christmas holiday (Dec 24-Jan 2).

Degree:
Electronics engineering / Telecommunications engineering with master’s degree.

**Language**:
English.

Software:
VHDL, Verilog, System Verilog, Cadence, Synopsys, RISC-V, ARM architectures.