Junior Fpga Engineer

hace 3 meses


Barcelona, España Gtd, Ingeniería De Sistemas Y De Software, S.A. A tiempo completo

.We are a high-tech company, committed to the design, integration, and operation of complex, mission-critical applications and systems throughout the world.We perform turnkey projects, engineering services and product development for our customers, developing state-of-the-art systems in the Space, Aerospace, Energy, Scientific Facilities and Defense and Security sectors. With a end-to-end approach, we seamlessly navigate the entire service cycle, from meticulous validation and ongoing maintenance to effective obsolescence management.GTD Science, Infrastructures, and Robotics (GTD SI&R) is the leading provider of high-quality, high-reliability software solutions, robotics' control systems, custom electronics, and edge computing. With its unique system and software engineering capabilities, GTD SI&R is the most reliable supplier of control, supervision, analysis, and decision support systems for real-time, large, and critical applications.The company's solutions (Control Systems, Bespoke Electronics, Embedded Systems, Control Centers) are integrated into the most significant "Big Science" international projects (including ITER and CERN) and into several of the largest Green Power Generation companies in the world.We are seeking an experienced Junior FPGA Engineer to contribute to prestigious projects like ITER (International Thermonuclear Experimental Reactor) and other significant initiatives in the realm of Big-Science.As a member of our dynamic team, you will play a pivotal role in the development of highly critical and real-time Control Systems tailored for scientific applications.Position activities:Define the FPGA detailed specification.Define the FW architecture to run within the FPGA.Design your own IP cores.Perform coding rules conformance check (linting).Design the testbenches for the IP cores.Validate the IP cores by simulation & by hardware.Perform functional & code coverage.Perform synthesis, implementation and bitstream generation.Automate the previous processes through script languages.Your profile:BSc or MSc in Digital Electronics Engineering or a related field.Over 1 year of experience in developing IP cores and testbenches using VHDL and (System)Verilog.Over 1 year of experience with FPGA development tools, primarily Xilinx Vivado IDE and Altera Quartus IDE.Design with modularity, reusability and readability principles in mind.Experience using simulation tools such as ModelSim and QuestaSim, as well as performing hardware validation with Integrated Logic Analyzers (ILAs).Familiar with unit-test frameworks including VUnit and UVM.Skilled in Python, TCL, and Bash scripting languages.Experienced with Git for version control.Proficient in using task and wiki management tools like JIRA and Confluence.Advanced user of both Windows and Linux OS.Good knowledge of laboratory instrumentation, including multimeters and oscilloscopes.Capable of writing comprehensive technical documentation


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