Senior/Principal Digital Methodology Engineer

hace 4 semanas

Madrid, España Renesas Electronics A tiempo completo

Job Description The Role To work within the Central Engineering Organisation to develop common Digital Implementation methodologies and support their adoption companywide. This includes developing and maintaining EDA tool flows & scripts, supporting Digital Design Team efforts, and partnering with them and technology expert groups on future enhancements & technology adoption.
Take on the role of 'Expertise Consultant' to the Design teams and make authoritative technical recommendations in order to provide solutions which have a significant impact on business performance, through improvements in productivity and quality Proactively identify and implement improvements to Methodology Scripts, Guidelines and Documentation Partner with the IP Enablement and Digital Place & Route Services teams on development & support of digital library views Build strong relationships with the Design Teams, providing them with an outstanding service and supporting lessons learned initiatives to identify continuous improvements in delivering predictable & high-quality implementation solutions Challenge existing processes and continuously seek ways to do things better in order to drive greater efficiencies for the business Share technical knowledge by means of developing & delivering training to the Design Teams, participating in internal & external conferences, and organizing lunch & learns Coach and mentor less experience team members. Conduct proactive research into the external market in order to keep abreast of what is happening in the technology arena and ensure the company understands the developments which will benefit the business. Your Profile Typically, 7+ years industry experience Strong understanding of Digital ASIC Design, Implementation & Verification flows Knowledge of Digital design techniques and coding languages (Verilog and System Verilog) Expert with Unix/Linux Environments Expert in Logic Synthesis, Design for Test, Static Timing / Power Analysis, Formal Equivalence Checking and Linting Strong experience with Python/Perl/TCL Strong Leadership skills combined with demonstratable contributions to a successful team environment. Efficient and proactive communication skills within a multi-site and multi-cultural environment. Excellent written and verbal communication skills in English, Ability to prioritize work, set goals and meet deadlines Strong interpersonal skills/ability to persuade and influence based on technical fact Willingness & ability to undertake occasional international travel Degree-level qualification in Electronics / Microelectronics Engineering or a related discipline Desirable:
Knowledge of the Liberty Digital Library format Additional Information Renesas Electronics Corporation empowers a safer, smarter and more sustainable future where technology helps make our lives easier. The leading global provider of microcontrollers, Renesas combines our expertise in embedded processing, analog, power and connectivity to deliver complete semiconductor solutions. These Winning Combinations accelerate time to market for automotive, industrial, infrastructure and IoT applications, enabling billions of connected, intelligent devices that enhance the way people work and live. Learn more at . 
Renesas' mission, To Make Our Lives Easier, is underpinned by our company culture, TAGIE. TAGIE stands for Transparent, Agile, Global, Innovative and Entrepreneurial. Our goal is to embed this unique culture in everything we do to succeed as a company and create trust with our diverse colleagues, customers and stakeholders.
Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our  Diversity & Inclusion Statement .

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